1. Field of the Invention
The present invention relates to a capacitor in semiconductor device. More particularly, the invention relates to a capacitor in a semiconductor device suitable for diffusion prevention between a lower electrode and a polysilicon in the capacitor and the oxidation prevention of a barrier metal layer. The invention yet further relates to a method for manufacturing the same.
2. Background of the Related Art
The higher a device packing density is, the less of an area available for a capacitor. Thus, the thickness of a dielectric layer is gradually decreased in order to compensate for the reduction of capacitance. However, the thinner a dielectric layer is, the greater the leakage current due to tunneling. As a result, the decrease in the thickness of the dielectric layer and the increase of leakage current generate problems, including the decrease of reproducibility and reliability.
In order to solve such a problem, a method has been commonly utilized in which a surface of very complicated roughness is formed in a storage node electrode to increase the effective area of the capacitor.
Moreover, stacked structures such as a nitride/oxide, oxide/nitride/oxide, etc., are used to keep with the trend of forming ultra thin films. However, in such a method, photolithography becomes difficult and thus the resulting process cost is increased due to the generation of a very significant coverage step. Accordingly, it is expected that this method cannot be used for manufacturing high integrated circuit devices of greater than 256 Mb DRAM.
Therefore, many methods have been proposed in which high dielectric constant materials are used as the dielectric film of a capacitor. Additionally, much research and development has been directed toward innovative improvement of capacitor capacity and the reduction of surface roughness.
Ta.sub.2 O.sub.5 is one material in which much research and development interest has been directed due to its high dielectric constant. Ta.sub.2 O.sub.5 has resulted in many improved characteristics, permitting a high packing density, and forming a very thin film. Nonetheless, the dielectric constant is actually not heightened. Thus, it is expected that the material will not be widely used due to the trend toward higher integration.
Recently, much attention has also been paid to use of a Perovskite type oxide in semiconductor devices because it also has a high dielectric constant.
PZT (Pb(Zr,Ti)O.sub.3), PLZT ((Pb,La)(Zr,Ti)O.sub.3), BST (Ba,Sr)TiO.sub.3), BaTiO.sub.3, and SrTiO.sub.3 are additionally high dielectric constant materials. However, these high dielectric constant materials have problems, most notably they easily react with silicon and polysilicon. Moreover, under strong oxidizing conditions their surfaces oxidize during formation of the high dielectric film. Thus, much research and development is currently being directed to improving electrode materials and electrode structure so as to obviate these types of problems. For example, a storage node constituting a lower electrode formed of platinum (Pt), which is hardly oxidized, restrains the generation of leakage current.
A conventional method for manufacturing a capacitor in a semiconductor device will be discussed with reference to the accompanying drawings.
FIGS. 1a to 1d show process steps of a conventional method for manufacturing a capacitor in a semiconductor device.
First, as shown in FIG. 1a, on a semiconductor substrate 1 in which an impurity diffusion region 2 is formed as a source/drain, there is formed an insulating layer 3. Then, the insulating layer 3 is selectively patterned by employing photolithography and photo etching so that a node contact hole 4 is formed on the impurity diffusion region 2.
Next, a polysilicon plug 5 is formed in the node contact hole 4, as shown in FIG. 1b. Subsequently, a TiW layer 6 and a lower electrode 7 are successively formed on the insulating layer 3 and the polysilicon plug 5 and then selectively patterned, so that only the TiW layer 6 and the lower electrode 7 used as a storage node are left. At this time, the lower electrode 7 is made of Pt, and the TiW layer 6, positioned between the lower electrode 7 and the polysilicon plug 5, is a barrier metal layer. If the Pt electrode used as the lower electrode 7 directly contacts the polysilicon plug 5, atoms of oxygen contained in a high dielectric layer formed on the lower electrode 7 contact atoms of silicon contained in the polysilicon plug 5, so that a silicon oxide layer (SiO.sub.2) is formed at the interface. Thus, the TiW layer 6 is formed as a barrier metal layer in order to prevent a direct contact of the polysilicon plug 5 and the lower electrode 7. In reference, diffusion of silicon increases the inherent resistance of the lower electrode and makes a thin oxide film 11 formed over the lower electrode 7, resulting in the reduction of the dielectric constant.
Referring to FIG. 1c, sidewall spacers 8 are formed on both sides of the lower electrode 7 and the TiW layer by using an oxide. At this time, the sidewall spacers 8 are used to prevent the TiW layer 6 from acting as a path of leakage current generated by the contact of the TiW layer and the high dielectric layer which is formed next.
Referring to FIG. 1d, on the lower electrode 7 and the surface of the sidewall spacers 8, there is formed a high dielectric layer 9 of BST ((Ba,Sr)TiO.sub.3) on which an upper electrode 10, i.e. a plate node, is formed.
FIG. 2 is a profile diagram showing measurements of diffusion of silicon atoms by means of SIMS (secondary ion mass spectroscopy) when a TiW layer is used as the barrier metal layer. The silicon atoms contained in the polysilicon plug 5 are prevented from diffusing into the TiW layer, and the oxygen atoms contained in a high dielectric constant material such as BST cross the grain boundary of the Pt lower electrode and diffuse into the TiW layer 6 during deposition of the high dielectric material.
In a conventional semiconductor device capacitor, a TiW layer 6 is formed in the interface of a polysilicon plug 5 and a lower electrode so that silicon atoms contained in the polysilicon plug 5 may be effectively prevented from diffusing into the lower electrode 7. However, on forming the high dielectric layer 9 on the lower electrode 7 of Pt, oxygen atoms contained in the high dielectric layer 9 cross the grain boundary of the lower electrode 7 and directly react with the TiW layer 6 which is a barrier metal layer, such that a TiO.sub.2 layer 11 is formed on the interface of the lower electrode 7 and the TiW layer 6. As a result, the contact of the lower electrode 7 and the TiW layer 6 is made unstable.
FIG. 3 is a cross-sectional view showing the structure of another conventional capacitor in a semiconductor device. The structure of the capacitor and the method thereof shown in FIG. 3 are quite similar to those shown in FIGS. 1a to 1d. However, there is one difference between the two. A TiN layer 12, not a TiW layer, is used as a barrier metal layer which is formed between a lower electrode 7 and a polysilicon plug 5. The purpose of forming the TiN layer 12 is the same as that of forming the TiW layer as described in FIG. 1c. It is formed to prevent the contact of silicon atoms contained in the polysilicon plug 5 and oxygen atoms contained in the high dielectric layer 9.
FIG. 4 is a profile diagram showing measurements of diffusion of silicon atoms by means of SIMS when a TiN layer is used as a barrier metal. It can be seen that oxygen atoms contained in a high dielectric layer which cross the grain boundary of the lower electrode 7 of Pt are prevented from diffusing to the TiN layer when the high dielectric layer made of, e.g., BST is formed on the lower electrode 7. Also, it can be seen that silicon atoms in the polysilicon plug 5 easily diffuse through the TiN layer 12, so that the oxygen atoms and the silicon atoms contact each other at the interface of the TiN layer 12 and the lower electrode 7.
In such a conventional capacitor in a semiconductor device, in order to effectively prevent oxygen atoms in the high dielectric layer from diffusing into the polysilicon plug, a TiN layer 12 is formed as a barrier metal layer in the interface. However, when the high dielectric layer 9 is formed on the lower electrode 7, the oxygen atoms of the high dielectric layer 9 diffuse through the grain boundary of the lower electrode 7 so to contact the Ti in the interface of the TiN layer 12 and the lower electrode 7, thus forming a TiO.sub.2 layer. Or, silicon atoms in the polysilicon plug 5 formed below the TiN layer 12 diffuse by crossing the TiN layer 12 so as to contact the oxygen atoms diffusing inward from the high dielectric layer 9 to the upper portion of the TiN layer 12. Thus, a silicon oxide layer 13 is formed at the interface of the lower electrode 7 and the TiN layer 12.
That is to say, the TiN layer is more effective as a barrier metal layer against oxygen atoms of the high dielectric layer than a TiW layer. On the other hand, the TiW layer is more effective as a barrier against silicon atoms of the polysilicon plug than the TiN layer. Accordingly, the silicon atoms in the polysilicon plug 5, by crossing the TiN layer 12, diffuse to the interface of the lower electrode 7 and the TiN layer 12 and thus the TiN layer 12 can not prevent the formation of the silicon oxide (SiO.sub.2) layer 13 which is formed by connection of the silicon atoms and the oxygen atoms. In such a case, the contact of the TiN layer 12 and the lower electrode 7 or the contact of the lower electrode 7 and the polysilicon plug 5 becomes unstable.
FIG. 5 is a cross-sectional view showing a conventional structure of still another capacitor in a semiconductor device.
The capacitor shown in FIG. 5 has a similar structure and a similar manufacturing method to those of the two previously described conventional ones. But there is, however, one difference. The difference is that a TaN layer 14, not a TiW layer or a TiN layer, is used as a barrier metal layer. It is known that the TaN layer 14 has an excellent oxidation prevention and an excellent oxygen diffusion prevention properties against oxygen atoms as compared to a TiW layer or a TiN layer, but that it has a poor silicon diffusion prevention properties against silicon atoms contained in the polysilicon plug 5, in comparison with the TiW layer.
FIG. 6 is a profile diagram showing measurements of diffusion of silicon atoms and oxygen atoms by means of SIMS when a TaN layer is used as a barrier metal layer. It is evident that, when a high dielectric layer 9 is deposited, oxygen atoms which have crossed the grain boundary of the lower electrode 7 of Pt are prevented from diffusing into the TaN layer 14. However, it is also evident that, when a high dielectric constant material, e.g. BST, is used as the high dielectric layer, the oxygen atoms crossing through the grain boundary of the platinum electrode used as the lower electrode 7 diffuse into the interface of the lower electrode 7 and the TaN layer 14 when the high dielectric layer 9 is formed. Additionally, the silicon atoms in the polysilicon plug 5 easily cross the TaN layer 14 by diffusion. As a result, the oxygen atoms and the silicon atoms contact one another at the interface of the TaN layer 14 and the lower electrode 7.
In the aforementioned example, in order to effectively prevent the oxygen atoms contained in the high dielectric layer 9 from diffusing to the polysilicon plug 5 by crossing the lower electrode 7, the TaN layer 14 is formed as a barrier metal layer. However in the process step of forming the high dielectric layer 9 on the lower electrode 7, the oxygen atoms contained in the high dielectric layer 9 cross the grain boundary of the lower electrode 7 and are present in the interface of the TaN layer 14 and the lower electrode 7. Also, the silicon atoms contained in the polysilicon plug 5 below the TaN layer 14 cross the TaN layer 14 by diffusion. As a result, the oxygen atoms and the silicon atoms are in the proximity of one another, thus forming a silicon oxide layer 13 in the interface of the lower electrode 7 and the TaN layer 14. Namely, the TaN layer 14 is more effective to be used as a barrier metal layer against the oxygen atoms contained in the high dielectric layer in comparison to a TiW layer or a TiN layer. On the other hand, the TaN layer 14 plays a poor role as a barrier metal layer against the silicon atoms contained in the polysilicon plug 5 in comparison with the TiW layer. As a result, the silicon atoms of the polysilicon plug 5 diffuse into the interface of the lower electrode 7 and the TaN layer 14, so that the formation of silicon oxide (SiO.sub.2) layer 13 by reaction between the oxygen atoms and the silicon atoms cannot be prevented.
A conventional capacitor in a semiconductor device thus has many problems. In order to increase capacitance of the capacitor, a high dielectric constant material, e.g., BST ((Ba,Sr)TiO.sub.3) is formed on a lower electrode. In this case, decreased performance results if the lower electrode and a polysilicon plug directly contact each other. Thus, any one of a TaN layer, a TiW layer, and a TiN layer is formed as a barrier metal layer in the interface of the lower electrode and the polysilicon plug. Nonetheless, the TiW layer cannot effectively prevent the diffusion of oxygen atoms, and the TaN layer or the TiN layer cannot prevent the diffusion of silicon atoms. As a result, an oxide layer is formed in the interface of the barrier metal layer and the lower electrode, or the barrier metal layer is oxidized. Consequently, the inherent resistance of the capacitor is increased or its dielectric constant is decreased.
The above references are incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.